Axera Named 2024 XuanTie Preferred Partner: Collaborating with XuanTie RISC-V to Enhance AI Computing and Industry Transformation
As an open standard instruction set architecture, RISC-V is seen as a new engine driving the development of next-generation information technology. In recent years, the RISC-V ecosystem has continued to flourish.
On March 14, 2024, the second XuanTie RISC-V Ecosystem Conference, centered around the theme “Openness and Connection,” was held in Shenzhen. This event brought together industry experts, technology leaders, business decision-makers, and RISC-V community developers from across the globe to explore the latest advancements in XuanTie RISC-V’s technological innovation, application expansion, and ecosystem achievements. Axera, a company dedicated to AI chip development and foundational computing platforms, was among the invitees to this significant gathering.
The conference also announced the “XuanTie Preferred Partners” award, with Axera among the eight companies selected. This honor aims to promote the implementation of XuanTie’s ecosystem achievements, connect the RISC-V ecosystem, and foster the growth of the XuanTie business ecosystem. Axera’s selection represents XuanTie’s recognition of its contributions to the RISC-V ecosystem.
At the conference, Axera’s Co-founder and Vice President, Jianwei Liu, was invited to deliver a keynote speech. He shared with the attendees insights into Axera Tongyuan NPU, an AI processor designed for computing power at the edge and terminal, and discussed the company’s efforts to enhance AI computing power and explore industry applications based on the RISC-V ecosystem.
Ubiquitous AI
RISC-V Powers Up AI Computing
From cloud-based large models like ChatGPT to edge computing boxes and cameras distributed across terminals, AI has become ubiquitous with the rapid advancement of technology. In various terminal applications such as smart driving, smart robots, smart factory, smart city, and smart retail, AI is starting to play a crucial role, boosting productivity across numerous industries.
As a company dedicated to developing chips that support edge and terminal intelligence, Axera is committed to the mission of “AI for All, AI for a Better World.” The company focuses on developing high-performance, low-power AI vision chips. Liu explained that Axera’s series of chip products have been widely applied and have achieved robust development in the AIoT and ADAS product lines, driving the deployment of AI on edge and terminal devices.
However, the deployment of AI on edge and terminal devices also entails higher requirements for computing power. In this context, the streamlined, flexible, and efficient RISC-V instruction set architecture has demonstrated its advantages and is poised to become one of the core processor architectures in the era of the Internet of Everything (IoE). As one of the XuanTie Preferred Partners, Axera shared its implementation practices based on the XuanTie RISC-V at the conference. For instance, in the IoT field, Axera has applied the XuanTie RISC-V processor in combination with its self-developed Axera Zhimou AI-ISP and Axera Tongyuan NPU . This integration enables rapid, low-power AI detection and wake-up, significantly reducing the power consumption of the system and easily meeting the demands of battery-powered products.
Additionally, Axera has integrated its Axera Tongyuan NPU with XuanTie RISC-V IP to create high-efficiency AI computing platforms. These platforms support demanding applications such as image segmentation and text-based image search, meeting the needs for perception, computation, and data processing across various edge and terminal scenarios.
Creating Native AI Processors
Partnering with XuanTie RISC-V to Reshape Industries
Now that computing power is the foundation of AI, what kind of infrastructure do we need in the age of AI?
Liu pointed out that as the computational density of AI programs increases, there is a growing need for NPUs, a new type of processor. “As a dedicated AI processor, the NPU should have its own instruction set rather than being simply seen as an accelerator or an extended instruction set,” he noted. In AI computing, instructions now primarily involve high-dimensional tensors. This shift requires processors to prioritize data computation over data movement and organization to reduce power consumption. In terms of inference, many AI algorithms and operators have reached a point of convergence. Therefore, by designing NPUs with operators as the focal point of the instruction set, the hardware microarchitecture design space can be expanded. This approach allows for more design strategies to be employed, thereby increasing energy efficiency.
As Axera’s self-developed core technology, the Axera Tongyuan NPU is an AI computing processor that uses operators as atomic instruction sets. It employs a multi-threaded, heterogeneous multi-core design to optimize operators, network microarchitecture, data flow, and memory access. This NPU efficiently supports mixed precision algorithm design and natively supports the Transformer architecture, providing a solid foundation for the application of large models on edge and terminal devices.
Additionally, the Axera Tongyuan NPU offers a mature and user-friendly compiler, significantly reducing the development and deployment costs of AI software. This enables customers to get started quickly, often within an hour, thereby driving the rapid growth of AI computing.
The Axera Tongyuan NPU is setting new benchmarks in the AI visual domain, demonstrating exceptional performance metrics. When running the Swin Transformer model (SwinT), the Axera Tongyuan NPU achieves a remarkable quantization accuracy of 80.45%, surpassing the industry average. Additionally, it delivers high performance of 416 FPS and maintains efficient power usage at 199 FPS/W.
To meet diverse AI computing needs, NPUs, as AI processors, require more flexible dynamic control. This is precisely why Axera has engaged in deep collaboration with XuanTie RISC-V. Axera is exploring the development of generative AI solutions based on the XuanTie RISC-V main control and the Axera Tongyuan NPU. “We hope to team up with XuanTie RISC-V to create optimal platforms for AI hardware, making AI accessible across different industries and empowering more customers to enhance efficiency and drive value,” said Liu.
